This invention relates in general to the field of timing circuitry. More particularly, this invention relates to a method and apparatus for a digitally controlled constant current source for phase adjustment of a synthesized clock.
In synchronous circuit applications, the clock signal is of the utmost importance. In particular, telecommunication switching systems require dependable timing signals to operate properly and to transmit digital data signals error free. To avoid failures caused by errors such as loss of clock and loss of frame, and to facilitate system fault diagnosis and testing, redundant timing signals may be provided. By using redundant timing signals, the system may operate with a backup timing signal upon detection of erroneous conditions in the active timing signal. Craft persons may also manually swap the timing signals in order to perform system diagnostics, maintenance and/or repairs. In telecommunication systems where high-speed data are transmitted, even single bit errors cannot be tolerated. It may be seen that in order to switch from one active clock signal to the other, the clock signals must be fully synchronous in frequency and phase to avoid producing bit errors in the data transmission.
One approach to solve this problem is to implement digital delay lines to phase align the redundant reference signals. A disadvantage of this approach is that it requires a large amount of delay lines to phase-align the redundant signals. Large numbers of delay lines lead to problems of temperature sensitivity of the digital lines. This problem is particularly acute in low frequency operation, where the number of delay lines becomes extremely large. An additional problem associated with this approach is that it is difficult to control phase wander in digital circuits. While it is possible to remedy this problem by to having each reference clock monitor the other, this solution is problematic because the circuitry necessary to control the cross-monitoring is very complex and expensive. Additionally, this solution presents problems of false detection of faults between the clocks.
Another solution to the problem of monitoring wander in the reference clocks is to monitor the two redundant reference clocks with a third clock. This solution, however, creates an additional expense of a third clock. Moreover, this solution places reliance on an unmonitored third clock, which has no guarantee of itself being accurate.
Still another approach is to use analog delay lines to align the phase of the redundant clocks. This solution is not realistic because the necessary analog lines are prohibitively expensive and take up too much space.
Yet another solution is to use a phase-locked loop to align a clock with another clock or a reference clock. However, this approach does not lend itself to fine adjustments.
Accordingly, a need has arisen for a circuit to closely phase align clock signals and permit fine adjustments to be made.
From the foregoing, it may be appreciated that a need has arisen for a method and apparatus for a digitally controlled constant current source for phase adjustment of a synthesized clock. In accordance with the present invention a method and apparatus for a digitally controlled constant current source for phase adjustment of a synthesized clock is provided which substantially eliminates or reduces the disadvantages and problems associated with prior adjustment methods.
In one embodiment an apparatus for adjusting the phase difference of a first clock signal and a second clock is provided. The apparatus includes a phase indicator which receives a first clock signal and a second clock signal and determines a phase relationship. A microprocessor outputs a digital value related to the phase relationship. An analog to digital converter receives the digital value and output an analog value based on the digital value. After that a voltage controlled constant current source receives the analog value and outputs a constant current source proportional to the analog value. Finally, a phase lock loop circuit receives the constant current source and adjusts the phase relationship.
The present invention provides various technical advantages over the conventional adjustment methods. For example, fine phase adjustments can be made. Other technical advantages are readily apparent to one skilled in the art from the following figures, descriptions and claims.